PLearn 0.1
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Classes | |
union | __attribute__ |
Defines | |
#define | sse_i2r(op, imm, reg) |
#define | sse_m2r(op, mem, reg) |
#define | sse_r2m(op, reg, mem) |
#define | sse_r2r(op, regs, regd) __asm__ __volatile__ (#op " %" #regs ", %" #regd) |
#define | sse_r2ri(op, regs, regd, imm) |
#define | sse_m2m(op, mems, memd, xmmreg) |
#define | sse_m2ri(op, mem, reg, subop) |
#define | sse_m2mi(op, mems, memd, xmmreg, subop) |
#define | movaps_m2r(var, reg) sse_m2r(movaps, var, reg) |
#define | movaps_r2m(reg, var) sse_r2m(movaps, reg, var) |
#define | movaps_r2r(regs, regd) sse_r2r(movaps, regs, regd) |
#define | movaps(vars, vard) |
#define | movntps_r2m(xmmreg, var) sse_r2m(movntps, xmmreg, var) |
#define | movntq_r2m(mmreg, var) sse_r2m(movntq, mmreg, var) |
#define | movups_m2r(var, reg) sse_m2r(movups, var, reg) |
#define | movups_r2m(reg, var) sse_r2m(movups, reg, var) |
#define | movups_r2r(regs, regd) sse_r2r(movups, regs, regd) |
#define | movups(vars, vard) |
#define | movhlps_r2r(regs, regd) sse_r2r(movhlps, regs, regd) |
#define | movlhps_r2r(regs, regd) sse_r2r(movlhps, regs, regd) |
#define | movhps_m2r(var, reg) sse_m2r(movhps, var, reg) |
#define | movhps_r2m(reg, var) sse_r2m(movhps, reg, var) |
#define | movhps(vars, vard) |
#define | movlps_m2r(var, reg) sse_m2r(movlps, var, reg) |
#define | movlps_r2m(reg, var) sse_r2m(movlps, reg, var) |
#define | movlps(vars, vard) |
#define | movss_m2r(var, reg) sse_m2r(movss, var, reg) |
#define | movss_r2m(reg, var) sse_r2m(movss, reg, var) |
#define | movss_r2r(regs, regd) sse_r2r(movss, regs, regd) |
#define | movss(vars, vard) |
#define | pshufw_m2r(var, reg, index) sse_m2ri(pshufw, var, reg, index) |
#define | pshufw_r2r(regs, regd, index) sse_r2ri(pshufw, regs, regd, index) |
#define | shufps_m2r(var, reg, index) sse_m2ri(shufps, var, reg, index) |
#define | shufps_r2r(regs, regd, index) sse_r2ri(shufps, regs, regd, index) |
#define | cvtpi2ps_m2r(var, xmmreg) sse_m2r(cvtpi2ps, var, xmmreg) |
#define | cvtpi2ps_r2r(mmreg, xmmreg) sse_r2r(cvtpi2ps, mmreg, xmmreg) |
#define | cvtps2pi_m2r(var, mmreg) sse_m2r(cvtps2pi, var, mmreg) |
#define | cvtps2pi_r2r(xmmreg, mmreg) sse_r2r(cvtps2pi, mmreg, xmmreg) |
#define | cvttps2pi_m2r(var, mmreg) sse_m2r(cvttps2pi, var, mmreg) |
#define | cvttps2pi_r2r(xmmreg, mmreg) sse_r2r(cvttps2pi, mmreg, xmmreg) |
#define | cvtsi2ss_m2r(var, xmmreg) sse_m2r(cvtsi2ss, var, xmmreg) |
#define | cvtsi2ss_r2r(reg, xmmreg) sse_r2r(cvtsi2ss, reg, xmmreg) |
#define | cvtss2si_m2r(var, reg) sse_m2r(cvtss2si, var, reg) |
#define | cvtss2si_r2r(xmmreg, reg) sse_r2r(cvtss2si, xmmreg, reg) |
#define | cvttss2si_m2r(var, reg) sse_m2r(cvtss2si, var, reg) |
#define | cvttss2si_r2r(xmmreg, reg) sse_r2r(cvtss2si, xmmreg, reg) |
#define | pextrw_r2r(mmreg, reg, field) sse_r2ri(pextrw, mmreg, reg, field) |
#define | pinsrw_r2r(reg, mmreg, field) sse_r2ri(pinsrw, reg, mmreg, field) |
#define | movmskps(xmmreg, reg) __asm__ __volatile__ ("movmskps %" #xmmreg ", %" #reg) |
#define | pmovmskb(mmreg, reg) __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) |
#define | maskmovq(mmregs, fieldreg) sse_r2ri(maskmovq, mmregs, fieldreg) |
#define | addps_m2r(var, reg) sse_m2r(addps, var, reg) |
#define | addps_r2r(regs, regd) sse_r2r(addps, regs, regd) |
#define | addps(vars, vard, xmmreg) sse_m2m(addps, vars, vard, xmmreg) |
#define | addss_m2r(var, reg) sse_m2r(addss, var, reg) |
#define | addss_r2r(regs, regd) sse_r2r(addss, regs, regd) |
#define | addss(vars, vard, xmmreg) sse_m2m(addss, vars, vard, xmmreg) |
#define | subps_m2r(var, reg) sse_m2r(subps, var, reg) |
#define | subps_r2r(regs, regd) sse_r2r(subps, regs, regd) |
#define | subps(vars, vard, xmmreg) sse_m2m(subps, vars, vard, xmmreg) |
#define | subss_m2r(var, reg) sse_m2r(subss, var, reg) |
#define | subss_r2r(regs, regd) sse_r2r(subss, regs, regd) |
#define | subss(vars, vard, xmmreg) sse_m2m(subss, vars, vard, xmmreg) |
#define | psadbw_m2r(var, reg) sse_m2r(psadbw, var, reg) |
#define | psadbw_r2r(regs, regd) sse_r2r(psadbw, regs, regd) |
#define | psadbw(vars, vard, mmreg) sse_m2m(psadbw, vars, vard, mmreg) |
#define | pmulhuw_m2r(var, reg) sse_m2r(pmulhuw, var, reg) |
#define | pmulhuw_r2r(regs, regd) sse_r2r(pmulhuw, regs, regd) |
#define | pmulhuw(vars, vard, mmreg) sse_m2m(pmulhuw, vars, vard, mmreg) |
#define | mulps_m2r(var, reg) sse_m2r(mulps, var, reg) |
#define | mulps_r2r(regs, regd) sse_r2r(mulps, regs, regd) |
#define | mulps(vars, vard, xmmreg) sse_m2m(mulps, vars, vard, xmmreg) |
#define | mulss_m2r(var, reg) sse_m2r(mulss, var, reg) |
#define | mulss_r2r(regs, regd) sse_r2r(mulss, regs, regd) |
#define | mulss(vars, vard, xmmreg) sse_m2m(mulss, vars, vard, xmmreg) |
#define | divps_m2r(var, reg) sse_m2r(divps, var, reg) |
#define | divps_r2r(regs, regd) sse_r2r(divps, regs, regd) |
#define | divps(vars, vard, xmmreg) sse_m2m(divps, vars, vard, xmmreg) |
#define | divss_m2r(var, reg) sse_m2r(divss, var, reg) |
#define | divss_r2r(regs, regd) sse_r2r(divss, regs, regd) |
#define | divss(vars, vard, xmmreg) sse_m2m(divss, vars, vard, xmmreg) |
#define | rcpps_m2r(var, reg) sse_m2r(rcpps, var, reg) |
#define | rcpps_r2r(regs, regd) sse_r2r(rcpps, regs, regd) |
#define | rcpps(vars, vard, xmmreg) sse_m2m(rcpps, vars, vard, xmmreg) |
#define | rcpss_m2r(var, reg) sse_m2r(rcpss, var, reg) |
#define | rcpss_r2r(regs, regd) sse_r2r(rcpss, regs, regd) |
#define | rcpss(vars, vard, xmmreg) sse_m2m(rcpss, vars, vard, xmmreg) |
#define | rsqrtps_m2r(var, reg) sse_m2r(rsqrtps, var, reg) |
#define | rsqrtps_r2r(regs, regd) sse_r2r(rsqrtps, regs, regd) |
#define | rsqrtps(vars, vard, xmmreg) sse_m2m(rsqrtps, vars, vard, xmmreg) |
#define | rsqrtss_m2r(var, reg) sse_m2r(rsqrtss, var, reg) |
#define | rsqrtss_r2r(regs, regd) sse_r2r(rsqrtss, regs, regd) |
#define | rsqrtss(vars, vard, xmmreg) sse_m2m(rsqrtss, vars, vard, xmmreg) |
#define | sqrtps_m2r(var, reg) sse_m2r(sqrtps, var, reg) |
#define | sqrtps_r2r(regs, regd) sse_r2r(sqrtps, regs, regd) |
#define | sqrtps(vars, vard, xmmreg) sse_m2m(sqrtps, vars, vard, xmmreg) |
#define | sqrtss_m2r(var, reg) sse_m2r(sqrtss, var, reg) |
#define | sqrtss_r2r(regs, regd) sse_r2r(sqrtss, regs, regd) |
#define | sqrtss(vars, vard, xmmreg) sse_m2m(sqrtss, vars, vard, xmmreg) |
#define | pavgb_m2r(var, reg) sse_m2r(pavgb, var, reg) |
#define | pavgb_r2r(regs, regd) sse_r2r(pavgb, regs, regd) |
#define | pavgb(vars, vard, mmreg) sse_m2m(pavgb, vars, vard, mmreg) |
#define | pavgw_m2r(var, reg) sse_m2r(pavgw, var, reg) |
#define | pavgw_r2r(regs, regd) sse_r2r(pavgw, regs, regd) |
#define | pavgw(vars, vard, mmreg) sse_m2m(pavgw, vars, vard, mmreg) |
#define | andps_m2r(var, reg) sse_m2r(andps, var, reg) |
#define | andps_r2r(regs, regd) sse_r2r(andps, regs, regd) |
#define | andps(vars, vard, xmmreg) sse_m2m(andps, vars, vard, xmmreg) |
#define | andnps_m2r(var, reg) sse_m2r(andnps, var, reg) |
#define | andnps_r2r(regs, regd) sse_r2r(andnps, regs, regd) |
#define | andnps(vars, vard, xmmreg) sse_m2m(andnps, vars, vard, xmmreg) |
#define | orps_m2r(var, reg) sse_m2r(orps, var, reg) |
#define | orps_r2r(regs, regd) sse_r2r(orps, regs, regd) |
#define | orps(vars, vard, xmmreg) sse_m2m(orps, vars, vard, xmmreg) |
#define | xorps_m2r(var, reg) sse_m2r(xorps, var, reg) |
#define | xorps_r2r(regs, regd) sse_r2r(xorps, regs, regd) |
#define | xorps(vars, vard, xmmreg) sse_m2m(xorps, vars, vard, xmmreg) |
#define | pmaxub_m2r(var, reg) sse_m2r(pmaxub, var, reg) |
#define | pmaxub_r2r(regs, regd) sse_r2r(pmaxub, regs, regd) |
#define | pmaxub(vars, vard, mmreg) sse_m2m(pmaxub, vars, vard, mmreg) |
#define | pmaxsw_m2r(var, reg) sse_m2r(pmaxsw, var, reg) |
#define | pmaxsw_r2r(regs, regd) sse_r2r(pmaxsw, regs, regd) |
#define | pmaxsw(vars, vard, mmreg) sse_m2m(pmaxsw, vars, vard, mmreg) |
#define | maxps_m2r(var, reg) sse_m2r(maxps, var, reg) |
#define | maxps_r2r(regs, regd) sse_r2r(maxps, regs, regd) |
#define | maxps(vars, vard, xmmreg) sse_m2m(maxps, vars, vard, xmmreg) |
#define | maxss_m2r(var, reg) sse_m2r(maxss, var, reg) |
#define | maxss_r2r(regs, regd) sse_r2r(maxss, regs, regd) |
#define | maxss(vars, vard, xmmreg) sse_m2m(maxss, vars, vard, xmmreg) |
#define | pminub_m2r(var, reg) sse_m2r(pminub, var, reg) |
#define | pminub_r2r(regs, regd) sse_r2r(pminub, regs, regd) |
#define | pminub(vars, vard, mmreg) sse_m2m(pminub, vars, vard, mmreg) |
#define | pminsw_m2r(var, reg) sse_m2r(pminsw, var, reg) |
#define | pminsw_r2r(regs, regd) sse_r2r(pminsw, regs, regd) |
#define | pminsw(vars, vard, mmreg) sse_m2m(pminsw, vars, vard, mmreg) |
#define | minps_m2r(var, reg) sse_m2r(minps, var, reg) |
#define | minps_r2r(regs, regd) sse_r2r(minps, regs, regd) |
#define | minps(vars, vard, xmmreg) sse_m2m(minps, vars, vard, xmmreg) |
#define | minss_m2r(var, reg) sse_m2r(minss, var, reg) |
#define | minss_r2r(regs, regd) sse_r2r(minss, regs, regd) |
#define | minss(vars, vard, xmmreg) sse_m2m(minss, vars, vard, xmmreg) |
#define | cmpps_m2r(var, reg, op) sse_m2ri(cmpps, var, reg, op) |
#define | cmpps_r2r(regs, regd, op) sse_r2ri(cmpps, regs, regd, op) |
#define | cmpps(vars, vard, op, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, op) |
#define | cmpeqps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 0) |
#define | cmpeqps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 0) |
#define | cmpeqps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 0) |
#define | cmpltps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 1) |
#define | cmpltps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 1) |
#define | cmpltps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 1) |
#define | cmpleps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 2) |
#define | cmpleps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 2) |
#define | cmpleps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 2) |
#define | cmpunordps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 3) |
#define | cmpunordps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 3) |
#define | cmpunordps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 3) |
#define | cmpneqps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 4) |
#define | cmpneqps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 4) |
#define | cmpneqps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 4) |
#define | cmpnltps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 5) |
#define | cmpnltps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 5) |
#define | cmpnltps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 5) |
#define | cmpnleps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 6) |
#define | cmpnleps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 6) |
#define | cmpnleps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 6) |
#define | cmpordps_m2r(var, reg) sse_m2ri(cmpps, var, reg, 7) |
#define | cmpordps_r2r(regs, regd) sse_r2ri(cmpps, regs, regd, 7) |
#define | cmpordps(vars, vard, xmmreg) sse_m2mi(cmpps, vars, vard, xmmreg, 7) |
#define | cmpss_m2r(var, reg, op) sse_m2ri(cmpss, var, reg, op) |
#define | cmpss_r2r(regs, regd, op) sse_r2ri(cmpss, regs, regd, op) |
#define | cmpss(vars, vard, op, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, op) |
#define | cmpeqss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 0) |
#define | cmpeqss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 0) |
#define | cmpeqss(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 0) |
#define | cmpltss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 1) |
#define | cmpltss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 1) |
#define | cmpltss(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 1) |
#define | cmpless_m2r(var, reg) sse_m2ri(cmpss, var, reg, 2) |
#define | cmpless_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 2) |
#define | cmpless(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 2) |
#define | cmpunordss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 3) |
#define | cmpunordss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 3) |
#define | cmpunordss(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 3) |
#define | cmpneqss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 4) |
#define | cmpneqss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 4) |
#define | cmpneqss(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 4) |
#define | cmpnltss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 5) |
#define | cmpnltss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 5) |
#define | cmpnltss(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 5) |
#define | cmpnless_m2r(var, reg) sse_m2ri(cmpss, var, reg, 6) |
#define | cmpnless_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 6) |
#define | cmpnless(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 6) |
#define | cmpordss_m2r(var, reg) sse_m2ri(cmpss, var, reg, 7) |
#define | cmpordss_r2r(regs, regd) sse_r2ri(cmpss, regs, regd, 7) |
#define | cmpordss(vars, vard, xmmreg) sse_m2mi(cmpss, vars, vard, xmmreg, 7) |
#define | comiss_m2r(var, reg) sse_m2r(comiss, var, reg) |
#define | comiss_r2r(regs, regd) sse_r2r(comiss, regs, regd) |
#define | comiss(vars, vard, xmmreg) sse_m2m(comiss, vars, vard, xmmreg) |
#define | ucomiss_m2r(var, reg) sse_m2r(ucomiss, var, reg) |
#define | ucomiss_r2r(regs, regd) sse_r2r(ucomiss, regs, regd) |
#define | ucomiss(vars, vard, xmmreg) sse_m2m(ucomiss, vars, vard, xmmreg) |
#define | unpcklps_m2r(var, reg) sse_m2r(unpcklps, var, reg) |
#define | unpcklps_r2r(regs, regd) sse_r2r(unpcklps, regs, regd) |
#define | unpckhps_m2r(var, reg) sse_m2r(unpckhps, var, reg) |
#define | unpckhps_r2r(regs, regd) sse_r2r(unpckhps, regs, regd) |
#define | fxrstor(mem) |
#define | fxsave(mem) |
#define | stmxcsr(mem) |
#define | ldmxcsr(mem) |
#define | sfence() __asm__ __volatile__ ("sfence\n\t") |
#define | prefetch(mem, hint) |
#define | prefetcht0(mem) prefetch(mem, t0) |
#define | prefetcht1(mem) prefetch(mem, t1) |
#define | prefetcht2(mem) prefetch(mem, t2) |
#define | prefetchnta(mem) prefetch(mem, nta) |
Functions | |
int | mm_support (void) |
int | sse_ok (void) |
#define addps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(addps, vars, vard, xmmreg) |
#define addss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(addss, vars, vard, xmmreg) |
#define andnps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(andnps, vars, vard, xmmreg) |
#define andps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(andps, vars, vard, xmmreg) |
#define cmpeqps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 0) |
#define cmpeqps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 0) |
#define cmpeqss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 0) |
#define cmpeqss_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 0) |
#define cmpleps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 2) |
#define cmpleps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 2) |
#define cmpless | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 2) |
#define cmpless_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 2) |
#define cmpltps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 1) |
#define cmpltps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 1) |
#define cmpltss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 1) |
#define cmpltss_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 1) |
#define cmpneqps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 4) |
#define cmpneqps_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpps, var, reg, 4) |
#define cmpneqps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 4) |
#define cmpneqss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 4) |
#define cmpneqss_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpss, var, reg, 4) |
#define cmpneqss_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 4) |
#define cmpnleps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 6) |
#define cmpnleps_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpps, var, reg, 6) |
#define cmpnleps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 6) |
#define cmpnless | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 6) |
#define cmpnless_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpss, var, reg, 6) |
#define cmpnless_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 6) |
#define cmpnltps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 5) |
#define cmpnltps_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpps, var, reg, 5) |
#define cmpnltps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 5) |
#define cmpnltss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 5) |
#define cmpnltss_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpss, var, reg, 5) |
#define cmpnltss_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 5) |
#define cmpordps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 7) |
#define cmpordps_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpps, var, reg, 7) |
#define cmpordps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 7) |
#define cmpordss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 7) |
#define cmpordss_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpss, var, reg, 7) |
#define cmpordss_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 7) |
#define cmpps | ( | vars, | |
vard, | |||
op, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, op) |
#define cmpps_m2r | ( | var, | |
reg, | |||
op | |||
) | sse_m2ri(cmpps, var, reg, op) |
#define cmpps_r2r | ( | regs, | |
regd, | |||
op | |||
) | sse_r2ri(cmpps, regs, regd, op) |
#define cmpss | ( | vars, | |
vard, | |||
op, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, op) |
#define cmpss_m2r | ( | var, | |
reg, | |||
op | |||
) | sse_m2ri(cmpss, var, reg, op) |
#define cmpss_r2r | ( | regs, | |
regd, | |||
op | |||
) | sse_r2ri(cmpss, regs, regd, op) |
#define cmpunordps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpps, vars, vard, xmmreg, 3) |
#define cmpunordps_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpps, var, reg, 3) |
#define cmpunordps_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpps, regs, regd, 3) |
#define cmpunordss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2mi(cmpss, vars, vard, xmmreg, 3) |
#define cmpunordss_m2r | ( | var, | |
reg | |||
) | sse_m2ri(cmpss, var, reg, 3) |
#define cmpunordss_r2r | ( | regs, | |
regd | |||
) | sse_r2ri(cmpss, regs, regd, 3) |
#define comiss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(comiss, vars, vard, xmmreg) |
#define cvtpi2ps_m2r | ( | var, | |
xmmreg | |||
) | sse_m2r(cvtpi2ps, var, xmmreg) |
#define cvtpi2ps_r2r | ( | mmreg, | |
xmmreg | |||
) | sse_r2r(cvtpi2ps, mmreg, xmmreg) |
#define cvtps2pi_m2r | ( | var, | |
mmreg | |||
) | sse_m2r(cvtps2pi, var, mmreg) |
#define cvtps2pi_r2r | ( | xmmreg, | |
mmreg | |||
) | sse_r2r(cvtps2pi, mmreg, xmmreg) |
#define cvtsi2ss_m2r | ( | var, | |
xmmreg | |||
) | sse_m2r(cvtsi2ss, var, xmmreg) |
#define cvtsi2ss_r2r | ( | reg, | |
xmmreg | |||
) | sse_r2r(cvtsi2ss, reg, xmmreg) |
#define cvtss2si_r2r | ( | xmmreg, | |
reg | |||
) | sse_r2r(cvtss2si, xmmreg, reg) |
#define cvttps2pi_m2r | ( | var, | |
mmreg | |||
) | sse_m2r(cvttps2pi, var, mmreg) |
#define cvttps2pi_r2r | ( | xmmreg, | |
mmreg | |||
) | sse_r2r(cvttps2pi, mmreg, xmmreg) |
#define cvttss2si_m2r | ( | var, | |
reg | |||
) | sse_m2r(cvtss2si, var, reg) |
#define cvttss2si_r2r | ( | xmmreg, | |
reg | |||
) | sse_r2r(cvtss2si, xmmreg, reg) |
#define divps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(divps, vars, vard, xmmreg) |
#define divss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(divss, vars, vard, xmmreg) |
#define fxrstor | ( | mem | ) |
#define fxsave | ( | mem | ) |
#define ldmxcsr | ( | mem | ) |
#define maskmovq | ( | mmregs, | |
fieldreg | |||
) | sse_r2ri(maskmovq, mmregs, fieldreg) |
#define maxps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(maxps, vars, vard, xmmreg) |
#define maxss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(maxss, vars, vard, xmmreg) |
#define minps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(minps, vars, vard, xmmreg) |
#define minss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(minss, vars, vard, xmmreg) |
#define movaps | ( | vars, | |
vard | |||
) |
#define movhlps_r2r | ( | regs, | |
regd | |||
) | sse_r2r(movhlps, regs, regd) |
#define movhps | ( | vars, | |
vard | |||
) |
#define movlhps_r2r | ( | regs, | |
regd | |||
) | sse_r2r(movlhps, regs, regd) |
#define movlps | ( | vars, | |
vard | |||
) |
#define movmskps | ( | xmmreg, | |
reg | |||
) | __asm__ __volatile__ ("movmskps %" #xmmreg ", %" #reg) |
#define movntps_r2m | ( | xmmreg, | |
var | |||
) | sse_r2m(movntps, xmmreg, var) |
#define movss | ( | vars, | |
vard | |||
) |
#define movups | ( | vars, | |
vard | |||
) |
#define mulps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(mulps, vars, vard, xmmreg) |
#define mulss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(mulss, vars, vard, xmmreg) |
#define orps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(orps, vars, vard, xmmreg) |
#define pavgb | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pavgb, vars, vard, mmreg) |
#define pavgw | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pavgw, vars, vard, mmreg) |
#define pextrw_r2r | ( | mmreg, | |
reg, | |||
field | |||
) | sse_r2ri(pextrw, mmreg, reg, field) |
#define pinsrw_r2r | ( | reg, | |
mmreg, | |||
field | |||
) | sse_r2ri(pinsrw, reg, mmreg, field) |
#define pmaxsw | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pmaxsw, vars, vard, mmreg) |
#define pmaxub | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pmaxub, vars, vard, mmreg) |
#define pminsw | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pminsw, vars, vard, mmreg) |
#define pminub | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pminub, vars, vard, mmreg) |
#define pmovmskb | ( | mmreg, | |
reg | |||
) | __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) |
#define pmulhuw | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(pmulhuw, vars, vard, mmreg) |
#define pmulhuw_r2r | ( | regs, | |
regd | |||
) | sse_r2r(pmulhuw, regs, regd) |
#define prefetch | ( | mem, | |
hint | |||
) |
#define prefetchnta | ( | mem | ) | prefetch(mem, nta) |
Definition at line 989 of file sse.h.
Referenced by PLearn::bprop_update_layer().
#define psadbw | ( | vars, | |
vard, | |||
mmreg | |||
) | sse_m2m(psadbw, vars, vard, mmreg) |
#define pshufw_m2r | ( | var, | |
reg, | |||
index | |||
) | sse_m2ri(pshufw, var, reg, index) |
#define pshufw_r2r | ( | regs, | |
regd, | |||
index | |||
) | sse_r2ri(pshufw, regs, regd, index) |
#define rcpps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(rcpps, vars, vard, xmmreg) |
#define rcpss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(rcpss, vars, vard, xmmreg) |
#define rsqrtps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(rsqrtps, vars, vard, xmmreg) |
#define rsqrtps_r2r | ( | regs, | |
regd | |||
) | sse_r2r(rsqrtps, regs, regd) |
#define rsqrtss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(rsqrtss, vars, vard, xmmreg) |
#define rsqrtss_r2r | ( | regs, | |
regd | |||
) | sse_r2r(rsqrtss, regs, regd) |
#define shufps_m2r | ( | var, | |
reg, | |||
index | |||
) | sse_m2ri(shufps, var, reg, index) |
#define shufps_r2r | ( | regs, | |
regd, | |||
index | |||
) | sse_r2ri(shufps, regs, regd, index) |
#define sqrtps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(sqrtps, vars, vard, xmmreg) |
#define sqrtss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(sqrtss, vars, vard, xmmreg) |
#define sse_i2r | ( | op, | |
imm, | |||
reg | |||
) |
#define sse_m2m | ( | op, | |
mems, | |||
memd, | |||
xmmreg | |||
) |
#define sse_m2mi | ( | op, | |
mems, | |||
memd, | |||
xmmreg, | |||
subop | |||
) |
#define sse_m2r | ( | op, | |
mem, | |||
reg | |||
) |
#define sse_m2ri | ( | op, | |
mem, | |||
reg, | |||
subop | |||
) |
#define sse_r2m | ( | op, | |
reg, | |||
mem | |||
) |
#define sse_r2r | ( | op, | |
regs, | |||
regd | |||
) | __asm__ __volatile__ (#op " %" #regs ", %" #regd) |
#define sse_r2ri | ( | op, | |
regs, | |||
regd, | |||
imm | |||
) |
#define stmxcsr | ( | mem | ) |
#define subps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(subps, vars, vard, xmmreg) |
#define subss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(subss, vars, vard, xmmreg) |
#define ucomiss | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(ucomiss, vars, vard, xmmreg) |
#define ucomiss_r2r | ( | regs, | |
regd | |||
) | sse_r2r(ucomiss, regs, regd) |
#define unpckhps_r2r | ( | regs, | |
regd | |||
) | sse_r2r(unpckhps, regs, regd) |
#define unpcklps_r2r | ( | regs, | |
regd | |||
) | sse_r2r(unpcklps, regs, regd) |
#define xorps | ( | vars, | |
vard, | |||
xmmreg | |||
) | sse_m2m(xorps, vars, vard, xmmreg) |
int mm_support | ( | void | ) | [inline] |
Definition at line 54 of file sse.h.
Referenced by sse_ok().
{ /* Returns 1 if MMX instructions are supported, 3 if Cyrix MMX and Extended MMX instructions are supported 5 if AMD MMX and 3DNow! instructions are supported 9 if MMX and SSE instructions are supported 0 if hardware does not support any of these */ register int rval = 0; __asm__ __volatile__ ( /* See if CPUID instruction is supported ... */ /* ... Get copies of EFLAGS into eax and ecx */ "pushf\n\t" "popl %%eax\n\t" "movl %%eax, %%ecx\n\t" /* ... Toggle the ID bit in one copy and store */ /* to the EFLAGS reg */ "xorl $0x200000, %%eax\n\t" "push %%eax\n\t" "popf\n\t" /* ... Get the (hopefully modified) EFLAGS */ "pushf\n\t" "popl %%eax\n\t" /* ... Compare and test result */ "xorl %%eax, %%ecx\n\t" "testl $0x200000, %%ecx\n\t" "jz NotSupported1\n\t" /* CPUID not supported */ /* Get standard CPUID information, and go to a specific vendor section */ "movl $0, %%eax\n\t" "cpuid\n\t" /* Check for Intel */ "cmpl $0x756e6547, %%ebx\n\t" "jne TryAMD\n\t" "cmpl $0x49656e69, %%edx\n\t" "jne TryAMD\n\t" "cmpl $0x6c65746e, %%ecx\n" "jne TryAMD\n\t" "jmp Intel\n\t" /* Check for AMD */ "\nTryAMD:\n\t" "cmpl $0x68747541, %%ebx\n\t" "jne TryCyrix\n\t" "cmpl $0x69746e65, %%edx\n\t" "jne TryCyrix\n\t" "cmpl $0x444d4163, %%ecx\n" "jne TryCyrix\n\t" "jmp AMD\n\t" /* Check for Cyrix */ "\nTryCyrix:\n\t" "cmpl $0x69727943, %%ebx\n\t" "jne NotSupported2\n\t" "cmpl $0x736e4978, %%edx\n\t" "jne NotSupported3\n\t" "cmpl $0x64616574, %%ecx\n\t" "jne NotSupported4\n\t" /* Drop through to Cyrix... */ /* Cyrix Section */ /* See if extended CPUID level 80000001 is supported */ /* The value of CPUID/80000001 for the 6x86MX is undefined according to the Cyrix CPU Detection Guide (Preliminary Rev. 1.01 table 1), so we'll check the value of eax for CPUID/0 to see if standard CPUID level 2 is supported. According to the table, the only CPU which supports level 2 is also the only one which supports extended CPUID levels. */ "cmpl $0x2, %%eax\n\t" "jne MMXtest\n\t" /* Use standard CPUID instead */ /* Extended CPUID supported (in theory), so get extended features */ "movl $0x80000001, %%eax\n\t" "cpuid\n\t" "testl $0x00800000, %%eax\n\t" /* Test for MMX */ "jz NotSupported5\n\t" /* MMX not supported */ "testl $0x01000000, %%eax\n\t" /* Test for Ext'd MMX */ "jnz EMMXSupported\n\t" "movl $1, %0:\n\n\t" /* MMX Supported */ "jmp Return\n\n" "EMMXSupported:\n\t" "movl $3, %0:\n\n\t" /* EMMX and MMX Supported */ "jmp Return\n\t" /* AMD Section */ "AMD:\n\t" /* See if extended CPUID is supported */ "movl $0x80000000, %%eax\n\t" "cpuid\n\t" "cmpl $0x80000000, %%eax\n\t" "jl MMXtest\n\t" /* Use standard CPUID instead */ /* Extended CPUID supported, so get extended features */ "movl $0x80000001, %%eax\n\t" "cpuid\n\t" "testl $0x00800000, %%edx\n\t" /* Test for MMX */ "jz NotSupported6\n\t" /* MMX not supported */ "testl $0x80000000, %%edx\n\t" /* Test for 3DNow! */ "jnz ThreeDNowSupported\n\t" "movl $1, %0:\n\n\t" /* MMX Supported */ "jmp Return\n\n" "ThreeDNowSupported:\n\t" "movl $5, %0:\n\n\t" /* 3DNow! and MMX Supported */ "jmp Return\n\t" /* Intel Section */ "Intel:\n\t" /* Check for SSE */ "SSEtest:\n\t" "movl $1, %%eax\n\t" "cpuid\n\t" "testl $0x02000000, %%edx\n\t" /* Test for SSE */ "jz MMXtest\n\t" /* SSE Not supported */ "movl $9, %0:\n\n\t" /* SSE Supported */ "jmp Return\n\t" /* Check for MMX */ "MMXtest:\n\t" "movl $1, %%eax\n\t" "cpuid\n\t" "testl $0x00800000, %%edx\n\t" /* Test for MMX */ "jz NotSupported7\n\t" /* MMX Not supported */ "movl $1, %0:\n\n\t" /* MMX Supported */ "jmp Return\n\t" /* Nothing supported */ "\nNotSupported1:\n\t" "#movl $101, %0:\n\n\t" "\nNotSupported2:\n\t" "#movl $102, %0:\n\n\t" "\nNotSupported3:\n\t" "#movl $103, %0:\n\n\t" "\nNotSupported4:\n\t" "#movl $104, %0:\n\n\t" "\nNotSupported5:\n\t" "#movl $105, %0:\n\n\t" "\nNotSupported6:\n\t" "#movl $106, %0:\n\n\t" "\nNotSupported7:\n\t" "#movl $107, %0:\n\n\t" "movl $0, %0:\n\n\t" "Return:\n\t" : "=a" (rval) : /* no input */ : "eax", "ebx", "ecx", "edx" ); /* Return */ return(rval); }
int sse_ok | ( | void | ) | [inline] |
Definition at line 223 of file sse.h.
References mm_support().
{ /* Returns 1 if SSE instructions are supported, 0 otherwise */ return ( (mm_support() & 0x8) >> 3 ); }